A One-Transistor DRAM Memory Cell Using HfO 2 -Based Ferroelectric-Assisted Charge Trapping Concept

作者：Mingkai Bai, Xiaoqing Sun, Runhao Han, Yajing Ding, Tao Hu, Yuanyuan Zhao, Saifei Dai, Kai Han, Junshuai Chai, Hao Xu, Xiaolei Wang, Wenwu Wang, Tianchun Ye · 发表于：IEEE Transactions on Electron Devices · 年份：2025 · DOI：10.1109/ted.2025.3560595 · 被引用次数：2 · 研究领域：Ferroelectric and Negative Capacitance Devices、Semiconductor materials and devices、VLSI and Analog Circuit Testing

For the first time, we present a one-transistor dynamic random access memory (DRAM) cell using the ferroelectric polarization-assisted charge trapping phenomenon. The gate structure is TiN/Hf0.5Zr0.5O2/SiOX/Si substrate. The spontaneous polarization of ferroelectric Hf0.5Zr0.5O is directed toward the substrate during programming and erasing operations. The purpose of introducing ferroelectric Hf0.5Zr0.5O2is to induce significant charge trapping. The device utilizes charge trapping for programming and detrapping for erasing. The proposed one-transistor DRAM (1T-DRAM) device shows fast write, latency-free reads, nondestructive readout, and excellent endurance characteristics (>1010).