Xiaolei Wang

机构：Chinese Academy of Sciences, Institute of Microelectronics, State Key Laboratory on Integrated Optoelectronics, Institute of Microelectronics, Fraunhofer Institute for Integrated Circuits · ORCID：0000-0001-9431-0058

发表论文 239 篇 · 总被引 2416 次 · h-index 25

代表论文

• Complementary Vertical FETs (CVFETs) Enabled by a Novel Dual-Side Process (2025 · IEEE Electron Device Letters · 被引 4)
• Record-high critical current density in infiltration-processed MgB2 bulk (2025 · Materials Today Physics · 被引 3)
• Investigating the Charge Trapping Behavior and Enhancing the Memory Window of Silicon Channel Hf 0.5 Zr 0.5 O 2 FeFET With SiO 2 /HfO 2 /SiO 2 Gate Side Interlayer (2025 · IEEE Transactions on Electron Devices · 被引 3)
• Comprehensive Analysis of Oxidant Effects During ALD Process of Hf 0.5 Zr 0.5 O 2 Ferroelectric Thin Films (2025 · IEEE Journal of the Electron Devices Society · 被引 3)
• Impact of Saturated Spontaneous Polarization on the Memory Window and Endurance of Hafnium-Based Si Channel FeFET (2025 · IEEE Transactions on Electron Devices · 被引 3)
• V FB Tuning and D it Modulation Using LaFMD and Al 2 O 3 Dual Dipoles in PMOS Stacked Nanowire Transistors (2025 · IEEE Electron Device Letters · 被引 2)