Complementary Vertical FETs (CVFETs) Enabled by a Novel Dual-Side Process

作者：Yong Du, Yongkui Zhang, Hongyue Zhu, Binghe Wang, Qingru Wang, W.L. Liu, Z. C. Wang, Ting Luo, Shan Lu, Pengyu Sun, Xiao‐Ya Chen, Yanlan Zheng, Hong Yang, Junjie Li, J.F. Li, Xiaolei Wang, Jun Luo, W.W. Wang, Bo Dai, Tianchun Ye · 发表于：IEEE Electron Device Letters · 年份：2025 · DOI：10.1109/led.2025.3587989 · 被引用次数：3 · 研究领域：Advancements in Semiconductor Devices and Circuit Design、Semiconductor materials and devices、Ferroelectric and Negative Capacitance Devices

We demonstrated the monolithically integrated complementary vertical-channel field-effect-transistor (CVFET) inverters with an innovative dual-side process (DSP). Good electrical characteristics for both NMOS and PMOS were achieved: transconductance of 69 μS/μm, Ion= 18 μA/μm (@ VGS– VT= 0.45 V, VDD= 0.65 V), Ion/Ioff= 3.1 × 106, SS = 69 mV/dec and DIBL = 12 mV/V for the top NMOS, and transconductance of 592 μS/μm, Ion= 136 μA/μm (@ VGS– VT= -0.45 V, VDD= -0.65 V), Ion/Ioff= 5.4 × 106, SS = 72 mV/dec and DIBL=18 mV/V for the bottom PMOS. The functional CVFET inverters show well-balanced voltage transfer characteristics (VTC) up to 1.2 V with a maximum gain of 13 V/V. Furthermore, the CVFETs also featured with crystal-Si vertical channels and common self-aligned high-κ metal gates. The CVFET structure and its integration scheme are strong candidates for the applications of advanced logic technologies.