Improved Memory Window and Retention of Silicon Channel Hf 0.5 Zr 0.5 O 2 FeFET by Using SiO 2 /HfO 2 /SiO 2 Gate Side Interlayer

作者：Runhao Han, Jia Yang, Tao Hu, Mingkai Bai, Yajing Ding, Xianzhou Shao, Saifei Dai, Xiaoqing Sun, Junshuai Chai, Hao Xu, Xiaolei Wang, Wenwu Wang, Tianchun Ye · 年份：2025 · DOI：10.1109/irps48204.2025.10983393 · 被引用次数：6 · 研究领域：Ferroelectric and Negative Capacitance Devices、Advancements in Semiconductor Devices and Circuit Design、Semiconductor materials and devices

We demonstrate a Si-channel Hf0.5Zr0.5O2FeFET that achieves a record-high memory window (MW) of up to 19.4 V, together with improved data retention. This advancement is realized by inserting the SiO2/HfO2/SiO2gate interlayer between the metal gate and the ferroelectric Hf0.5Zr0.5O2layer. The gate interlayer effectively retains the charges injected from the metal gate. The influence of SiO2thickness on the reliability was investigated. Although thicker SiO2layer enhance the memory window, its endurance is poor. The data retention improves with increasing SiO2layer thickness. Furthermore, the charge trapping behaviors of gate-injected electrons and holes are asymmetric. This work provides new insights into the gate-injected charges and data retention in the FeFETs with gate interlayer.