Xianzhou Shao

机构：Institute of Microelectronics, Institute of Microelectronics

发表论文 10 篇 · 总被引 27 次 · h-index 2

代表论文

• Impact of Top SiO₂ Interlayer Thickness on Memory Window of Si Channel FeFET With TiN/SiO₂/Hf₀.₅Zr₀.₅O₂/SiOx/Si (MIFIS) Gate Structure (2024 · IEEE Transactions on Electron Devices · 被引 20)
• Improved Memory Window and Retention of Silicon Channel Hf0.5Zr0.5O2 FeFET by Using SiO2/HfO2/SiO2 Gate Side Interlayer (2025 · 被引 6)
• Deep Understanding of Charge Trapping Phenomenon in n-FeFET and Endurance Improvement by Interlayer Engineering (2024 · 被引 1)
• Unveiling Retention Loss Mechanism in FeFETs With Gate-Side Interlayer by Decoupling Trapped Charges and Ferroelectric Polarization (2026 · IEEE Transactions on Electron Devices)
• Investigation of the Physical Mechanism behind Retention Loss in FeFETs with MIFIFIS Gate Structure (2025 · arXiv (Cornell University))
• Impact of interlayer on gate leakage during endurance fatigue of Si-channel FeFETs (2025 · Applied Physics Letters)