Geometric Variability Aware Quantum Potential based Quasi-ballistic Compact Model for Stacked 6 nm-Thick Silicon Nanosheet GAA-FETs

作者：Shijie Huang, Zhenghua Wu, Haoqing Xu, Jingrui Guo, Lihua Xu, Xinlv Duan, Qian Chen, Guanhua Yang, Qingzhu Zhang, Huaxiang Yin, Lingfei Wang, Ling Li, Ming Liu · 年份：2021 · DOI：10.1109/iedm19574.2021.9720550 · 被引用次数：20 · 研究领域：Semiconductor materials and devices、Advancements in Semiconductor Devices and Circuit Design、Ferroelectric and Negative Capacitance Devices

Quantum-corrected quasi-ballistic compact model is developed for Stacked Silicon Nanosheet (SiNS) Gate-all-around (GAA) FETs. Theories of Density-Gradient-Poisson (DG-P), Singular perturbation and quasi-ballistic to interpret quantum mechanicals on density profile and charge transport are employed in analytical expressions of current, terminal charge and trans-capacitance. Besides, the model incorporates ultra-scaling induced subthreshold degradation and is rigidly verified by comparing to 6-nm-thick-SiNS based experiments (of both${P-}$and$N$-GAAFET) and GTS simulations (of down to 15 nm channel length). Instead of classical Schrodinger-Poisson theory, it holds features of computation-efficiency and SPICE-compatibility. Especially, awareness of geometric variability enables performance and reliability assessments that statistical effects of stacked nanosheets on on-state voltage are predicted. Hence, this high-efficient quantum corrected model is promising in designing integrated circuits and developing a geometry aware design-technology co-optimization flow in the next generation technology node.