Huaxiang Yin

机构：Chinese Academy of Sciences, Institute of Microelectronics, Institute of Microelectronics, Fraunhofer Institute for Integrated Circuits, University of Chinese Academy of Sciences · ORCID：0000-0001-8066-6002

发表论文 350 篇 · 总被引 4768 次 · h-index 34

代表论文

• Linear Tuning of Positive Threshold Voltage in IGZO Thin-Film Transistors via Gate Dielectric Stack Engineering (2025 · IEEE Electron Device Letters · 被引 10)
• Investigation of TiN/LaO x Interface Dipole Effect on Negative Flat-Band Voltage ( V FB ) Shift in TiN/LaO x /HfO 2 /SiO 2 Gate Stacks Using Dipole-Last Technology (2025 · IEEE Transactions on Electron Devices · 被引 4)
• High-Performance Two-Tier FinFETs With Low-Temperature (≤ 500 °C) Silicide Dopant Segregation Schottky S-D for M3D Circuits (2025 · IEEE Electron Device Letters · 被引 4)
• Optimized SOI Stacked Si Nanosheet Gate-All-Around FET With Ni(Pt)Si Silicide-First and Load-Si Thinning Techniques (2025 · IEEE Transactions on Electron Devices · 被引 3)
• Performance improvement of gate-all-around (GAA) devices by optimized super-steep retrograde well (2025 · Microelectronics Journal · 被引 3)
• Experiment Investigation of La₂O₃ Dipole-Last Cap-Less V FB Tuning Technology With Low-Thermal Post Deposition Anneal (2025 · IEEE Journal of the Electron Devices Society · 被引 2)