High Mobility TMD NMOS and PMOS Transistors and GAA Architecture for Ultimate CMOS Scaling

作者：Ashish Verma Penumatcha, Kevin O’Brien, K. Maxey, Wouter Mortelmans, Rachel C. Steinhardt, Sourav Dutta, C. J. Dorow, C. H. Naylor A., Kitamura Kitamura, Tao Zhong, Tristan A. Tronic, Pratyush Buragohain, Carly Rogan, Chou‐Ching K. Lin, Mahmut S. Kavrik, J. Lux, A. Oni, A. Vyatskikh, S. Lee, N. Arefin, P. Fischer, S. Clenndenning, M. Radosavljević, M. Metz, Uygar E. Avci · 年份：2023 · DOI：10.1109/iedm45741.2023.10413662 · 被引用次数：24 · 研究领域：Advanced Memory and Neural Computing、Semiconductor materials and devices、ZnO doping and properties

Transition metal dichalcogenide [TMD] 2D channel materials offer a unique opportunity for scaled transistor gate lengths below 10 nm to enable ultra-scaled polypitch. The significant scaling advantage of 2D materials is due to their high mobility values at sub-1 nm thickness, which thus far are experimentally reported to be lower than predicted. In this work, we present high-mobility 2D TMD NMOS and PMOS transistors using M0S2 and WSe2. A high-temperature MOCVD growth process achieves a hole mobility of 50 cm2/Vs, with PMOS ON-current of 247 μA/pm. We also report high-mobility M0S2NMOS with mobilities up to 45 cm2/Vs, along with the first reported TMD PMOS Gate-All -Around [GAA] transistor with SSlin~107mV/dec. Finally, we compare critically today’s 2D transistors to reference silicon transistors and discuss improvements needed to realize TMD’s potential as a replacement for Front-End-Of-Line (FEOL) silicon.