Advancing Toward 4F² 1T1R RRAM With Local NAND-gate and Isolation Scheme

作者：Shengyu Bao, Zongwei Wang, Yuhang Yang, Qishen Wang, Linbo Shan, Lin Bao, Yimao Cai, Ru Huang · 发表于：IEEE Transactions on Electron Devices · 年份：2025 · DOI：10.1109/ted.2025.3554165 · 被引用次数：7 · 研究领域：Advanced Memory and Neural Computing、Ferroelectric and Negative Capacitance Devices、Semiconductor materials and devices

In this work, we introduce an innovative NAND-gate array structure that optimizes cell density through local series connection. By implementing a p-well isolation in combination with the substrate bias effect, we effectively mitigate the operating voltage constraints on series-connected cells. This design ensures symmetric read operations and maintains uniform read margins among cells in the NAND-gate array, achieving a record cell size of 0.045 μm2at the 40-nm technology node. This design demonstrates robust reliability with an endurance of 100k cycles and a ten-year retention at 150∘C. Moreover, the implementation of deep trench isolation (DTI) technology enables further density enhancements, with a projected cell area of 0.0255 μm2at the 28-nm technology node. This approach offers significant advancements in resistive random access memory (RRAM) density, making it highly suitable for high-density memory and computing applications.