A Novel SiC Trench MOSFET with Unilateral P Buried Layer for Improved Oxide Electric Field and Switching Loss

作者：Yangyang Wu, Jun Yuan, Kuan Wang, Fei Guo, Wei Chen, Zhijie Cheng, Shaodong Xu, Guoqing Xin, Zhiqiang Wang · 年份：2023 · DOI：10.1109/sslchinaifws60785.2023.10399651 · 被引用次数：8 · 研究领域：Silicon Carbide Semiconductor Technologies、Semiconductor materials and devices、Advancements in Semiconductor Devices and Circuit Design

A novel SiC trench MOSFET with unilateral P buried layer (SiC UP-MOS) for improved oxide electric field and switching loss is proposed and characterized in this paper. Compared with SiC asymmetric trench MOSFET (AT-MOS), the UP-MOS exhibits the lower ON-resistance (Ron) and third quadrant ON-state voltage drop (Von) due to the higher channel density and the integrated Schottky barrier diode. Benefited from the grounded unilateral P buried layer, UP- MOS achieves a more excellent tradeoff between the Ronand the maximum gate oxide electric field (Eox,max) than AT-MOS. Moreover, thanks to the smaller overlaps of gate to drain, the UP-MOS shows a lower transfer capacitance (Cgd), thus the turn-off and turn-on loss of UP-MOS is 65.7% lower and 48.9% lower than those of AT-MOS, respectively. Considering the conduction and switching capability, the high-frequency figure of merit (HFFOM, i.e., Ron×Cgd) for UP-MOS is improved by 4.4 times compared with AT-MOS. The performance improvements indicate that the SiC UP-MOS is a competitive candidate for high-voltage and high-frequency applications.