BDS

作者：Congguang Yang, Maciej Ciesielski, Vigyan Singhal · 年份：2000 · DOI：10.1145/337292.337323 · 被引用次数：54 · 研究领域：Low-power high-performance VLSI design、Formal Methods in Verification、VLSI and Analog Circuit Testing

This paper describes a new BDD-based logic optimization system, BDS. It is based on a recently developed theory for BDD-based logic decomposition, which supports both algebraic and Boolean factorization. New techniques, which are crucial to the manipulation of BDDs in a partitioned Boolean network environment, are described in detail. The experimental results show that BDS has a capability to handle very large circuits. It offers a superior runtime advantage over SIS, with comparable results in terms of circuit area and often improved delay.