Chuanke Chen

机构：Chinese Academy of Sciences, Institute of Microelectronics, University of Chinese Academy of Sciences · ORCID：0009-0001-0477-2927

发表论文 14 篇 · 总被引 180 次 · h-index 6

代表论文

• Vertical Channel-All-Around (CAA) IGZO FET under 50 nm CD with High Read Current of 32.8 μA/μm (V th + 1 V), Well-performed Thermal Stability up to 120 ℃ for Low Latency, High-density 2T0C 3D DRAM Application (2022 · 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 被引 61)
• First Demonstration of Stacked 2T0C-DRAM Bit-Cell Constructed by Two-Layers of Vertical Channel-All-Around IGZO FETs Realizing 4F 2 Area Cost (2023 · 被引 50)
• Novel a-IGZO TFT Pixel Driving Circuit Using Hybrid PWM and PAM Method With Lower Power Consumption for Micro-LED Display (2024 · IEEE Electron Device Letters · 被引 25)
• Vertical Channel-All-Around (CAA) IGZO FET With Recessed Source/Drain Structure to Improve Contact Characteristics (2025 · IEEE Electron Device Letters · 被引 11)
• Deep Insights into Interlayer in TiN/IGZO Contact and its Impact on Contact Resistance of CAA FETs: First-Principles Calculation, Experimental Study and Modeling (2024 · 被引 8)
• TCAD Simulation Study of Cylindrical Vertical Double-Surrounding-Gate a-InGaZnO FETs and Geometric Parameter Optimization (2025 · IEEE Journal of the Electron Devices Society · 被引 7)