Jinshan Yue

机构：Chinese Academy of Sciences, Institute of Microelectronics, Institute of Microelectronics, University of Chinese Academy of Sciences · ORCID：0000-0001-8234-7400

发表论文 110 篇 · 总被引 1723 次 · h-index 24

代表论文

• 14.5 A 28nm 192.3TFLOPS/W Accurate/Approximate Dual-Mode-Transpose Digital 6T-SRAM CIM Macro for Floating-Point Edge Training and Inference (2025 · 被引 24)
• High-density three-dimensional integration of dynamic random-access memory using vertical dual-gate IGZO TFTs (2025 · Nature Communications · 被引 11)
• Hybrid SRAM/ROM Compute-in-Memory Architecture for High Task-Level Energy Efficiency in Transformer Models With 8928-kb/mm² Density in 28nm CMOS (2025 · IEEE Journal of Solid-State Circuits · 被引 10)
• A monolithic 3D IGZO-RRAM-SRAM-integrated architecture for robust and efficient compute-in-memory enabling equivalent-ideal device metrics (2025 · Science China Information Sciences · 被引 6)
• SHMT: An SRAM and HBM Hybrid Computing-in-Memory Architecture With Optimized KV Cache for Multimodal Transformer (2025 · IEEE Transactions on Circuits and Systems I Regular Papers · 被引 4)
• An RRAM-Based Computing-in-Memory Macro With Low-Power Readout/Hold Circuits and Activation Differential Strategy for AdderNet (2025 · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 被引 4)