Chip Design 2020

作者：L. John · 发表于：IEEE Micro · 年份：2020 · DOI：10.1109/mm.2020.3028542 · 研究领域：Computer Science

& IEEE MICRO ROUNDS up the year 2020 with an issue on “Chip Design” and “Commercial Products” circa 2020. The last two years have been a great time for the chip design. Several innovative new chips are being taped out from companies around the world. Interesting advances are happening in technology, circuit, architecture, and applications. In 2019, Cerebras demonstrated a wafer-scale integrated chip, where the entire wafer is one chip. This wafer-scale chip is more than 50 larger than any other chip built before. 3D-stacked chips and die-stacked memory chips are being built. Modern processor chips contain tens of billions of transistors. The Wafer Scale Engine from Cerebras contains more than a trillion transistors. At this exciting time for chip-design, we are happy to bring to our readers an issue on chip design topics. The issue contains two themes, both related to chip design: 1) Chip Design 2020; and 2) Commercial Products. The Chip Design 2020 theme has three papers, one on circuits/architecture, another on the use of machine learning for chip design, and a third one on an emerging technology, FerroElectronics. Dr. Jaydeep Kulkarni of the University of Texas guest edited the Chip Design 2020 Special Issue. Circuits and architectures for in-memory computing are presented in an article from Purdue University, followed by an article on design automation methodologies for accelerating chip design using machine learning from NVIDIA. The third article in this theme is on an i...