CMOS compatible multi‐state memristor for neuromorphic hardware encryption with low operation voltage

作者：Bo Sun, Jinhao Zhang, Jieru Song, Jialin Meng, David Wei Zhang, Tianyu Wang, Lin Chen · 发表于：InfoMat · 年份：2025 · DOI：10.1002/inf2.70044 · 被引用次数：10 · 研究领域：Advanced Memory and Neural Computing、Physical Unclonable Functions (PUFs) and Hardware Security、Ferroelectric and Negative Capacitance Devices

Abstract Different from traditional software encryption, hardware encryption shows obvious advantages in AI information encryption application scenarios with high reliability and high security requirements. With the development of memristors, memristor‐based hardware encryption attracted the interests of researchers in secure communication. Hafnium‐based memristors have received widespread attention due to fast speed, low power consumption, and compatibility with CMOS technology. In this study, a HfAlO x ‐based memristor with an ON/OFF ratio of >10 4 , an endurance characteristic of 10 5 cycles, and a low operating voltage of 0.56 V/−0.135 V was proposed. Eight‐level states were achieved and used to design a hardware encryption scheme through a neural network. Parallel information encryption operations of “S” “D” “U” were realized in a memristor array. By constructing an artificial neural network, the recognition rate of encrypted letters without/with memristor is 62.3% and 98.1%, respectively. The memristor‐based encryption scheme further expands the choices and application prospects of hardware encryption. image