The Integration of Low-K Films Into MOSFET Process

作者：Miao Zhang, Wei Sun, Nuo Xu, Xin Sun, Wenxu Duan, Xiaoyu Liu, Yan Sun, Xiaoping Shi · 年份：2025 · DOI：10.1109/cstic64481.2025.11017888 · 研究领域：Advancements in Semiconductor Devices and Circuit Design、Semiconductor materials and devices、Copper Interconnects and Reliability

The integration of low-dielectric materials in advanced semiconductor devices is critical for reducing parasitic capacitance and enhancing performance. Silicon oxycarbonitride (SiOCN) has been identified as a promising material for low dielectric constent (low-k) material gate sidewall spacers in MOSFET technology. This study examines the integration of SiOCN spacers within MOSFET gate structures. Device gate patterning was performed using electron beam lithography (EBL) and self-aligned double patterning (SADP) process, ensuring precision and scalability. SiOCN films, prepared via atomic layer deposition (ALD), exhibit excellent uniformity and demonstrate strong compatibility with anisotropic etching processes. These features make them highly suitable for advanced device applications.