A 96-nA Quiescent Current LDO With Embedded BGR Using Adaptive Pole Tracking and Adaptive Transconductance Technique

作者：Xiangwen Xin, Ping Luo, Hao Wang, Jingwei Huang, Xiaowen Chen, Chang Liu · 发表于：IEEE Transactions on Circuits & Systems II Express Briefs · 年份：2024 · DOI：10.1109/tcsii.2024.3481068 · 被引用次数：11 · 研究领域：Silicon Carbide Semiconductor Technologies、Advancements in Semiconductor Devices and Circuit Design、Semiconductor materials and devices

This brief proposes an ultra-low-power low dropout (LDO) regulator using adaptive pole tracking and adaptive transconductance technique, aimed at further enhancing the efficiency of power management integrated circuits (PMIC). In light current loads, only the folded cascode amplifier is opened to provide excellent output voltage accuracy while reducing power consumption. In heavy current loads, activating the operational transconductance amplifier improves transient performance. An adaptive pole-tracking technique has been applied in the proposed LDO to ensure loop stability. In addition, a low-power bandgap reference was embedded into the proposed LDO, which simplifies the peripheral circuit of LDO in practical application. The proposed ultra-low-power LDO was fabricated in a$0.18~\mu $m BCD process, with an overshoot and undershoot voltage of 12mV, and ultra-low quiescent current of 96nA.