A 40-nm Compute-in-Memory Macro With RRAM Addressing IR Drop and Off-State Current

作者：Samuel D. Spetalnick, Muya Chang, S. KONNO, Brian Crafton, Ashwin Sanjay Lele, Win-San Khwa, Yu-Der Chih, Meng‐Fan Chang, Arijit Raychowdhury · 发表于：IEEE Solid-State Circuits Letters · 年份：2023 · DOI：10.1109/lssc.2023.3338212 · 被引用次数：12 · 研究领域：Advanced Memory and Neural Computing、Ferroelectric and Negative Capacitance Devices、Semiconductor materials and devices

This letter describes an analog current-summing compute-in-memory macro using resistive random-access memory (RRAM). The readout transimpedance amplifiers use offset canceling with differential inputs from added sensing paths for the bitline (BL) and sourceline (SL) to minimize channel-to-channel (ch./ch.) gain error while mitigating IR drop in the BL, SL, and multiplexors (MUXes). The analog-to-digital converters (ADCs) use dynamic offset cancelation to remove ch./ch. ADC intrinsic offset and error due to RRAM off-state current. The 64Kb macro implemented with foundry RRAM in 40-nm CMOS has an area of 0.0263 mm2, ch./ch. gain std. dev. of 1.9%, IR drop per-wordline of 0.004%, and 1.1 V efficiency of 7.8–58.8 TOPS/W.