An 80-GBaud PAM-4 $G_{\mathrm{m}}$ -Boosted Variable-Gain TIA in 22-nm FDSOI

作者：Jianan Zhao, Sorin P. Voinigescu · 年份：2023 · DOI：10.1109/bcicts54660.2023.10310939 · 被引用次数：5 · 研究领域：Radio Frequency Integrated Circuit Design、Semiconductor materials and devices、Advancements in Semiconductor Devices and Circuit Design

A variable-gain transimpedance amplifier (VG-TIA) with over$80-\text{dB}\Omega$differential$Z_{21}$and over 45 dB of gain control, 36-GHz bandwidth, operating at record symbol and data rates of up to 80 GBaud PAM-4 and 160 Gb/s, respectively, is presented. The differential multi-stage TIA features a 6-mA, 53-$\text{dB}\Omega\ g_{\mathrm{m}}$-boosted cascode input stage with 70-GHz bandwidth which minimizes the differential input equivalent noise and input impedance, making its bandwidth less sensitive to the PIN photodiode capacitance, while simultaneously providing$59-\Omega$input impedance per side for ease of on-die testing without a photodiode. A double-cascode Gilbert-Cell VGA and two fixed-gain Cherry-Hooper stages provide the extra 25 dB of gain and help maintain the THD below 3 % for differential input currents up to 4.8$\text{mA}_{\text{pp}}$. The equivalent input noise current remains below 21.4$\text{pA}/\sqrt{}\text{Hz}$up to 50 GHz.