Improved compact model extraction of statistical variability in 5 nm nanosheet transistors and applied to SRAM simulations

作者：Ruihan Li, Haowen Luo, Yichen Wang, Zhengwu Yuan, Asen Asenov, Xiangshui Miao, Xingsheng Wang · 发表于：Semiconductor Science and Technology · 年份：2022 · DOI：10.1088/1361-6641/ac836d · 被引用次数：4 · 研究领域：Advancements in Semiconductor Devices and Circuit Design、Semiconductor materials and devices、Integrated Circuits and Semiconductor Failure Analysis

Abstract In this paper, we look at how artificial neural networks (ANNs) may be used to improve compact model extraction of statistical variability in 5 nm nanosheet transistors (NSTs) and how it can be applied to 6NST-static random access memory (SRAM) simulations. To begin, both the TCAD simulation platform and compact model of 3D n-type and p-type NST have been rigorously validated against the experimental data. The transfer characteristics curves of 1104 NST samples generated by metal gate granularity, random discrete dopants and line edge roughness are used to extract the important figures of merit (FoM) including ON-current ( I ON ), OFF-current ( I OFF ), threshold voltage ( V TH ) and subthreshold slope. Meanwhile, we can collect the main compact model parameters of these NST samples using our automatic extraction technique. Furthermore, a multi-layer ANN engine is trained to anticipate the important compact model parameters by entering FoMs, which significantly speeds up the automatic extraction. When we compare the prediction results to the genuine values, we discover that their correlation coefficients are all larger than 0.99. Finally, we simulated the 6NST-SRAM circuit and obtained its stability variation, with the help of extracted NST variability by the aforementioned speedup techniques.