Full Bottom Dielectric Isolation to Enable Stacked Nanosheet Transistor for Low Power and High Performance Applications

作者：J. Zhang, Julien Frougier, Andrew Greene, Xiren Miao, Yu Lan, Reinaldo A. Vega, P. Montanini, C. Durfee, A. Gaul, S. Pancharatnam, Charlotte Adams, Heng Wu, H. Zhou, Tian Shen, Ruijie Xie, M. Sankarapandian, J. Wang, Kenichi Watanabe, R. Bao, X. Liu, C. Park, H. Shobha, P. J. Amal Joseph, Dexin Kong, Abraham Arceo de la Peña, J. Li, Rena M. Conti, Daniel J. Dechene, N. Loubet, R. Chao, T. Yamashita, Robert R. Robison, Veeraraghavan Basker, Kai Zhao, D. Guo, Bala Haran, R. Divakaruni, H. Bu · 年份：2019 · DOI：10.1109/iedm19573.2019.8993490 · 被引用次数：99 · 研究领域：Semiconductor materials and devices、Ferroelectric and Negative Capacitance Devices、Advancements in Semiconductor Devices and Circuit Design

In this paper, full bottom dielectric isolation (BDI) is first demonstrated on horizontally stacked Nanosheet device structures with Lmetal 12 nm. The comparison of full BDI scheme vs punch through stopper (PTS) scheme has been systematically studied. By comparing off-state leakage current, short channel behavior and effective capacitance (Ceff) for both schemes, we show that BDI could potentially provide: 1) good immunity of sub-channel leakage due to process variation (from parasitic "fat-Fin" which is unique in Nanosheet structure); 2) power-performance co-optimization.