Recryptor: A Reconfigurable Cryptographic Cortex-M0 Processor With In-Memory and Near-Memory Computing for IoT Security

作者：Yiqun Zhang, Li Xu, Qing Dong, Jingcheng Wang, David Blaauw, Dennis Sylvester · 发表于：IEEE Journal of Solid-State Circuits · 年份：2018 · DOI：10.1109/jssc.2017.2776302 · 被引用次数：124 · 研究领域：Cryptographic Implementations and Security、Chaos-based Image/Signal Encryption、Cryptography and Data Security

Providing security for the Internet of Things (IoT) is increasingly important, but supporting many different cryptographic algorithms and standards within the physical constraints of IoT devices is highly challenging. Software implementations are inefficient due to the high bitwidth cryptographic operations; domain-specific accelerators are often inflexible; and reconfigurable crypto processors generally have large area and power overhead. This paper proposes Recryptor, a reconfigurable cryptographic processor that augments the existing memory of a commercial general-purpose processor with compute capabilities. It supports in-memory bitline computing using a 10-transistor bitcell to support different bitwise operations up to 512-bits wide. Custom-designed shifter, rotator, and S-box modules sit near the memory, providing high-throughput near-memory computing capabilities. We demonstrate Recryptor's programmability by implementing the cryptographic primitives of various public/secret key cryptographies and hash functions. Recryptor runs at 28.8 MHz in 0.7 V, achieving 6.8× average speedup and 12.8× average energy improvements over the state-of-the-art software- and hardware-accelerated implementations with only 0.128 mm2area overhead in 40-nm CMOS.