Design of low power low noise amplifier for portable electrocardiogram recording system applications

作者：Xiao Yang, Cheng Qi, Li-fei Lin, Weiwei Huang, Chaodong Ling · 年份：2011 · DOI：10.1109/asid.2011.5967423 · 被引用次数：14 · 研究领域：Analog and Mixed-Signal Circuit Design、ECG Monitoring and Analysis、Advancements in PLL and VCO Technologies

Electrocardiogram (ECG) signals have the characteristics of low amplitude and low frequency. A low-power, low-noise and low voltage amplifier is required for long term ECG signals monitoring. Chopping technique is an efficient approach to decrease the 1/f noise of CMOS amplifiers, but conventional chopper amplifier consumes large power because it required a wide-band amplifier exceed chopping frequency and a post low-pass filter to filter modulation noise. Moreover, the DC offset created by skin-electrode interface can reach as high as ±100mV and can easily saturate the amplifier, which limits the amount of gain applied to amplifiers. In this paper, an amplifier with low power, low noise and electrode dc offset suppression is presented for ECG recording system applications. The main amplifier is a chopper amplifier without post low-pass filter, which can reduce power consumption. The complete amplifier configured with the low power chopper amplifier can suppress the electrode dc offset effectively. The circuit of the presented amplifier is designed in TSMC 0.18μm 1P4M CMOS process. The achieved input integrated referred noise voltage is 0.68μV rms from 0.1Hz to 150Hz with high CMRR of 107dB. The power consumption is 46.8 μW with μ0.9V supply.