Design of High-Throughput Fixed-Point Complex Reciprocal/Square-Root Unit

作者：Dong Wang, M.D. Ercegovac, Nanning Zheng · 发表于：IEEE Transactions on Circuits & Systems II Express Briefs · 年份：2010 · DOI：10.1109/tcsii.2010.2050946 · 被引用次数：25 · 研究领域：Numerical Methods and Algorithms、Digital Filter Design and Implementation、Advanced Image Processing Techniques

Complex reciprocal and square-root operations are used in many digital signal processing (DSP) and numerical computations. In particular, high-throughput fixed-point implementations are desired in high-performance systems. This brief describes a novel design of high-throughput 16-bit fixed-point complex reciprocal/square-root unit. Our approach uses an interpolation algorithm based on the 2-D cubic convolution. Consisting of lookup tables, a small amount of logic, and embedded DSP blocks, the unit is implemented as a four-stage pipeline, achieving a throughput rate of 46 MHz on the Altera Stratix-II FPGA, comparing favorably with the existing designs which achieve a maximum throughput of about 10 MHz on mainstream field-programmable gate arrays (FPGAs). The proposed scheme is also applicable to high-throughput implementation on other platforms as well as of other complex functions.