Beyond the conventional transistor

作者：H.‐S. Philip Wong · 发表于：IBM Journal of Research and Development · 年份：2002 · DOI：10.1147/rd.462.0133 · 被引用次数：574 · 研究领域：Advancements in Semiconductor Devices and Circuit Design、Carbon Nanotubes in Composites、Semiconductor materials and devices

This paper focuses on approaches to continuing CMOS scaling by introducing new device structures and new materials. Starting from an analysis of the sources of improvements in device performance, we present technology options for achieving these performance enhancements. These options include high-dielectric-constant (high-k) gate dielectric, metal gate electrode, double-gate FET, and strained-silicon FET. Nanotechnology is examined in the context of continuing the progress in electronic systems enabled by silicon microelectronics technology. The carbon nanotube field-effect transistor is examined as an example of the evaluation process required to identify suitable nanotechnologies for such purposes.