New 1.7kV IGBT chip with fine pattern and optimized buffer layer

作者：John F. Donlon, Eric R. Motto, Katsumi Satoh, Kenji Suzuki, Y. Yoshihiura, Tsunaki Takahashi · 年份：2010 · DOI：10.1109/apec.2010.5433642 · 被引用次数：2 · 研究领域：Silicon Carbide Semiconductor Technologies、Thin-Film Transistor Technologies、Silicon and Solar Cell Technologies

Since the introduction of the IGBT, improvements in power loss and efficiency have been achieved by applying new technologies. In this paper, refinements in fine pattern processing technology and optimization of the low impurity profile of the buffer layer using thin wafer technology are proposed to further reduce the power loss and improve efficiency in 1.7kV IGBT chips.